The invention relates to a recording system, a data recording apparatus, a memory apparatus, and a data recording method, in which a memory card which is detachable to/from an apparatus is used as a recording medium.
According to an electrically rewritable non-volatile memory called EEPROM (Electrically Erasable Programmable ROM), since one bit is constructed by two transistors, an occupation area per bit is large and there is a limitation in case of raising an integration degree. To solve such a problem, a flash memory in which one bit can be realized by one transistor by an all-bit batch erasing method has been developed. The flash memory is expected as a memory which can be substituted for a recording medium such as magnetic disk, optical disk, or the like.
It is known that a memory card having a flash memory is constructed so as to be detachable to/from an apparatus. By using such a memory card, a digital audio recording and reproducing apparatus using the memory card in place of the conventional disk-shaped medium such as CD (Compact Disc), MD (Minidisc), or the like can be realized. Besides audio data, still image data and motion image data can be also recorded into the memory card and it can be used as a recording medium of a digital still camera or a digital video camera.
According to the flash memory, a data unit called a segment is divided into a predetermined number of clusters (fixed length) and one cluster is divided into a predetermined number of sectors (fixed length). The cluster is also called a block. The sector is also called a page. In the flash memory, an erasure is performed in a lump on a cluster unit basis, and the writing or reading operation is performed in a lump on a sector unit basis.
For example, in case of the flash memory of 4 MB (megabytes), as shown in FIG. 12, one segment is divided into 512 clusters. The segment is a unit for managing a predetermined number of clusters. One cluster is divided into 16 sectors. One cluster has a capacity of 8 kB (kilobytes). One sector has a capacity of 512 B. A memory of a capacity of 16 MB can be constructed by using four segments each having a capacity of 4 MB.
As shown in FIG. 13A, logic cluster addresses are allocated to a memory space of 16 MB. The logic cluster address is set to a length of 2 bytes in order to distinguish 512xc3x974=2048 clusters. In FIG. 13, the logic cluster address is expressed by a hexadecimal number. 0x denotes the hexadecimal notation. A logic address is an address which is logically handled by a data processing apparatus (software). A physical address is added to each cluster in the flash memory. A correspondence relation between the clusters and the physical addresses is unchanged.
According to the flash memory, by rewriting data, an insulating film deteriorates and the number of rewriting times is limited. Therefore, it is necessary to prevent a situation that accesses are repetitively and concentratedly performed to a certain same memory area (cluster). In case of rewriting data in a certain logic address stored in a certain physical address, in a file system of the flash memory, updated data is not rewritten into the same cluster but the updated data is written to an unused cluster. Thus, the correspondence relation between the logic addresses and the physical addresses before the data updating changes after the updating. By performing such a swapping process as mentioned above, the situation that the accesses are repetitively and concentratedly performed to the same cluster is prevented, so that a life of the flash memory can be extended.
Since the logic cluster address is accompanied by the data which has once been written into the cluster, even if physical cluster addresses in which the data before updating and the data after the updating are written are changed, the same address is seen from a file management system and the subsequent accesses can be properly performed. Since the correspondence relation between the logic addresses and the physical addresses is changed by the swapping process, a logical/physical address conversion table showing the correspondence between them is needed. By referring to such a table, the physical cluster address corresponding to the designated logic cluster address is specified, thereby enabling the access to the cluster shown by the specified physical cluster address to be performed.
The logical/physical address conversion table is stored in a memory by the data processing apparatus. If a memory capacity of the data processing apparatus is small, the table can be stored in the flash memory. FIG. 13B shows an example of a logical/physical address conversion table regarding segment 1. As shown in FIG. 13B, in the logical/physical address conversion table, the physical cluster addresses (2 bytes) are made to correspond to the logic cluster addresses (2 bytes) arranged in the ascending order, respectively. The logical/physical address conversion table is managed every segment and its size increases in accordance with the capacity of the flash memory.
There is a case where it is desirable to set a data writing speed to be higher than the ordinary one by making a plurality of storages of the flash memory operative in parallel. For example, an electronic music distribution EMD for distributing music data through a network is being put into practical use. The distributed music data is stored into a hard disk of a personal computer, data of a desired music piece is copied or moved into a memory card by the personal computer, and the memory card is attached into a portable recorder, so that the user can easily listen to the desired music at a place other than his home. Data of a plurality of music pieces is downloaded into the memory card from the hard disk by a parallel writing operation (at a high speed) and, upon reproduction, the music data is read out from the memory card at a normal speed.
FIG. 14 shows a construction of a conventional logic address for four storages. In he example of the diagram, address spaces in the memory are expressed by 11 bits of A0, A1, . . . , and A10. A0 denotes the LSB (least significant bit) and A10 indicates the MSB (most significant bit). The storages each having a capacity of 4 MB are switched by the MSB (A10) and the second MSB (A9). Addresses of 9 bits of A0 to A8 are allocated to a sector and a segment in each storage.
When data is written, the operation is executed at a timing as shown in FIG. 15. First, the data is transferred from the host side to a page buffer of a sector size. Time T is required to transfer. In a next write busy period, the data is transferred from the page buffer into a flash buffer in the flash memory and the data is written into the storage.
Upon reading, as shown in FIG. 16, the data is read out from the flash memory for a read busy period. The read-out data is transferred to a page buffer of a sector size. In the next transfer time T, the data is transferred from the page buffer to the host side.
FIG. 17 is a flowchart showing a flow of processes in case of writing data into continuous logic sectors 0 to 3 belonging to different clusters in a certain segment. In first step S11, a logical/physical conversion table is formed with respect to a segment as a target to be written. In step S12, sector 0 is sent from the host side. The time T is required for this transfer. In step S13, sector 0 is written into the flash memory. In step S14, sector 1 is sent from the host side. In step S15, sector 1 is written into the flash memory. Processes for sending of sector 2 (step S16), writing of sector 2 (step S17), sending of sector 3 (step S18), and writing of sector 3 (step S19) are sequentially performed. Hitherto, for example, even if four storages are provided in parallel, since accesses are concentrated to one storage, a high processing speed cannot be realized.
As for a data construction of one sector on the flash memory, as shown in FIG. 18, an area having a length of 16 bytes in which management information is recorded is added to data of 512 bytes. The management information comprises a logic cluster number, cluster management information, and attribute information. The cluster management information is set to the same information among all sectors in a certain cluster and includes information indicative of valid/invalid of the cluster or the like. The attribute information is information of every sector and includes copyright information or the like. For example, when the flash memory is attached into the apparatus, the host side reads the management information and forms a table of the logic cluster and the physical cluster with respect to the segment.
In case of performing the writing operation into the memory in parallel, generally, the input data is converted into parallel data and the parallel data is simultaneously written into the memory. Since the writing/reading operations into/from the flash memory are performed on a sector unit basis, the data of a plurality of sectors is converted into parallel data. In FIG. 19, reference numeral 50 denotes data such as an audio file or the like. It is now assumed that a size of data 50 of one file coincides with a data amount of four clusters. The data 50 as much as 512 bytes is written into each sector in the flash memory. For example, the data as much as four continuous head sectors 0, 1, 2, and 3 is simultaneously written into the sectors in the storages 0 to 3.
As shown in FIG. 19, if the data of four continuous sectors in the data file 50 is recorded in parallel so as to be distributed into the storages, a format different from the existing file format such that one cluster is arranged in the same storage occurs. That is, according to the conventional file format, a group of 16 sectors in each storage is handled as a cluster and the data is erased on a cluster unit basis. In the flash memory recorded by the method of FIG. 19, on the other hand, in order to erase the data of 16 continuous sectors, the cluster constructed by four sectors of each of the four storages has to be erased. Thus, the erasing area and one or a plurality of cluster areas do not coincide and a compatibility with the existing flash memory is lost with respect to the file format.
It is, therefore, an object of the invention to provide a recording system, a data recording apparatus, a memory apparatus, and a data recording method, in which when performance upon writing is improved by the parallel writing, a compatibility of a file format with that of a conventional non-volatile memory can be held.
To solve the above problem, according to the invention of claim 1, there is provided a recording system having a detachable memory apparatus with a non-volatile memory constructed by a plurality of clusters each consisting of a plurality of sectors and a data recording apparatus for recording data constructed by a plurality of continuous sectors into the memory apparatus, comprising:
address designating means for designating an address of the sector for recording the data; and
recording means for recording the data into the sector designated by the address designating means,
wherein the address designating means can designate a plurality of sector addresses in the plurality of clusters and designates the addresses so that the continuous sectors of the recording data are recorded as continuous sectors in the cluster, and
the recording means can simultaneously record the data into the plurality of sectors.
According to the invention of claim 2, there is provided a data recording apparatus using a detachable memory apparatus including a non-volatile memory as a recording medium, comprising:
address designating means for recording data in a plurality of sectors into the memory apparatus in parallel,
wherein the address designating means can designate a plurality of sector addresses in a plurality of clusters and designates the addresses so that the continuous sectors of the recording data are recorded as sectors which are continuous in the cluster.
According to the invention of claim 3, there is provided a memory apparatus which is detachable to/from a data recording apparatus, comprising:
a non-volatile memory;
recording means for recording data; and
interface means arranged among the data recording apparatus, the non-volatile memory, and security means,
wherein the recording means can simultaneously record the data into a plurality of sectors so that the continuous sectors of the recording data are recorded as sectors which are continuous in a cluster.
According to the invention of claim 1, there is provided a data recording apparatus for recording data existing in a plurality of clusters each consisting of a plurality of sectors into a plurality of storages in parallel, comprising the steps of:
selecting a writing sector from the plurality of clusters so that the sectors are continuously arranged in each cluster after completion of parallel writing processes; and
recording the plurality of selected writing sectors in parallel.
According to the invention, by writing the data in parallel, the clusters are constructed on the same storage. Therefore, a compatibility of a file format with that of the existing memory apparatus can be held.